Clock domain crossing serial interface, direct latching, and response codes

US8996736B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-8996736-B2
Application numberUS-201313950713-A
CountryUS
Kind codeB2
Filing dateJul 25, 2013
Priority dateFeb 1, 2013
Publication dateMar 31, 2015
Grant dateMar 31, 2015

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  2. Abstract

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  5. First independent claim

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Abstract

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Aspects of a clock domain crossing serial interface, direct latching over the serial interface, and response codes are described. In various embodiments, a data communication command received over a serial interface is identified, and an address received over the serial interface is resolved to access a register bank. In a write operation, depending upon whether the address falls within a direct latch address range of the register bank, data may be directly latched into a direct latch register of the register bank or into a first-in-first-out register. For both read and write operations, reference may be made to a status register of the serial interface to identify or mitigate error conditions, and wait times may be relied upon to account for a clock domain crossing. After each of the read and write operations, a response code including a status indictor may be communicated.

First claim

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At least the following is claimed: 1. A method, comprising: identifying a data communication command received over a serial interface; resolving an address received over the serial interface to access a register bank; communicating data over the serial interface; decoding the address to obtain information associated with the address; and based on the information associated with the address and at least some content of the data communication command, communicating a write e…

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What does patent US8996736B2 cover?
Aspects of a clock domain crossing serial interface, direct latching over the serial interface, and response codes are described. In various embodiments, a data communication command received over a serial interface is identified, and an address received over the serial interface is resolved to access a register bank. In a write operation, depending upon whether the address falls within a direc…
Who is the assignee on this patent?
Broadcom Corp
What technology area does this patent fall under?
Primary CPC classification G06F13/126. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Mar 31 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).