Multi-purpose IO pads/bumps on semiconductor chips to maximize chip-to-chip data connectivity
US-12182051-B1 · Dec 31, 2024 · US
US8995839B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8995839-B2 |
| Application number | US-201213544199-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jul 9, 2012 |
| Priority date | Jul 9, 2012 |
| Publication date | Mar 31, 2015 |
| Grant date | Mar 31, 2015 |
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A gearbox IC is incorporated into an optical communications system to enable an optical link that incorporates the system to achieve data rates that are at least double that which are currently achievable in optical links. The gearbox IC performs data rate conversion and phase alignment. In the transmit direction, the gearbox IC receives N lanes of electrical data signals having a data rate of X Gbps and outputs N/2 lanes of electrical data signals having a data rate of 2X Gbps. In the receive direction, the gearbox IC receives N/2 electrical data signals having a data rate of 2X Gbps and converts the N/2 electrical data signals into N electrical data signals having a data rate of X.
Opening claim text (preview).
What is claimed is: 1. A gearbox integrated circuit (IC) comprising: a first electrical interface having N input terminals for inputting N electrical data signals having a data rate of X gigabits per second (Gbps) and N output terminals for outputting N electrical data signals having a data rate of X Gbps, wherein N is a positive integer that is equal to or greater than two and X is a positive number that is equal to or greater than one; phase-alignment circuitry for phase-align…
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