System and method for re-sequencing data packets on a per-flow basis

US8995445B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-8995445-B2
Application numberUS-72290003-A
CountryUS
Kind codeB2
Filing dateNov 26, 2003
Priority dateDec 19, 2002
Publication dateMar 31, 2015
Grant dateMar 31, 2015

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

Official abstract text for this publication.

In a network device packets are marked with sequence identifiers at ingress of the device, switched through a plurality of switching planes and re-sequenced on a per flow basis at egress of the device. The re-sequencing system includes a controller that allocates to each received data packet a temporary storage location in a packet buffer. A plurality of output registers are provided, with each one associated with a flow. A pointer uses predefined parameters to point to an output register that has been previously assigned to receive data packets from the corresponding flow. Parameters in the pointed output register are correlated with parameters in a received packet to determine if the received packet is next in sequence to packets processed through a particular queue.

First claim

Opening claim text (preview).

Having thus described our invention, what we claim is as follows: 1. A system for resequencing per flow data packets received by at least one destination egress adapter comprising: a plurality of output registers with each register dynamically assigned to store received data packets from one of a plurality of flows, wherein each of the output registers further comprises: a packet sequence number and a packet buffer identifier for an in-process data packet; and a valid-bit latc…

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What does patent US8995445B2 cover?
In a network device packets are marked with sequence identifiers at ingress of the device, switched through a plurality of switching planes and re-sequenced on a per flow basis at egress of the device. The re-sequencing system includes a controller that allocates to each received data packet a temporary storage location in a packet buffer. A plurality of output registers are provided, with each…
Who is the assignee on this patent?
Le Maut Francois, Glaise Rene, Poret Michel, and 2 more
What technology area does this patent fall under?
Primary CPC classification H04L49/552. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 31 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).