Semiconductor device comprising a second organic film over a third insulating film wherein the second organic film overlaps with a channel formation region and a second conductive film

US8994887B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-8994887-B2
Application numberUS-201414499313-A
CountryUS
Kind codeB2
Filing dateSep 29, 2014
Priority dateFeb 12, 1999
Publication dateMar 31, 2015
Grant dateMar 31, 2015

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Abstract

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In an active matrix type liquid crystal display device, in which functional circuits such as a shift register circuit and a buffer circuit are incorporated on the same substrate, an optimal TFT structure is provided along with the aperture ratio of a pixel matrix circuit is increased. There is a structure in which an n-channel TFT, with a third impurity region which overlaps a gate electrode, is formed in a buffer circuit, etc., and an n-channel TFT, in which a fourth impurity region which does not overlap the gate electrode, is formed in a pixel matrix circuit. A storage capacitor formed in the pixel matrix circuit is formed by a light shielding film, a dielectric film formed on the light shielding film, and a pixel electrode. Al is especially used in the light shielding film, and the dielectric film is formed anodic oxidation process, using an Al oxide film.

First claim

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What is claimed is: 1. A semiconductor device comprising: a semiconductor layer comprising a channel formation region; a gate electrode over the semiconductor layer; a first insulating film interposed between the semiconductor layer and the gate electrode; a second insulating film over the gate electrode; a source wiring over the second insulating film; a drain wiring over the second insulating film; a first organic film over the source wiring and the drain wiring; a…

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What does patent US8994887B2 cover?
In an active matrix type liquid crystal display device, in which functional circuits such as a shift register circuit and a buffer circuit are incorporated on the same substrate, an optimal TFT structure is provided along with the aperture ratio of a pixel matrix circuit is increased. There is a structure in which an n-channel TFT, with a third impurity region which overlaps a gate electrode, i…
Who is the assignee on this patent?
Semiconductor Energy Lab
What technology area does this patent fall under?
Primary CPC classification H10D86/481. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 31 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).