CDS circuit, image sensor including the same, and image processing device including the image sensor

US8994854B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-8994854-B2
Application numberUS-201313771409-A
CountryUS
Kind codeB2
Filing dateFeb 20, 2013
Priority dateFeb 22, 2012
Publication dateMar 31, 2015
Grant dateMar 31, 2015

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Abstract

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A correlated double sampling (CDS) circuit includes a correction circuit configured to receive an input pixel signal through a first node via a column line, correct the input pixel signal, and output the corrected pixel signal through a second node; and a comparator including first and second input terminals, the first input terminal being connected to the second node and being configured to receive the corrected pixel signal, and the second input terminal configured to receive a ramp signal, the comparator being configured to compare the corrected pixel signal with the ramp signal and output a comparison signal indicating a result of the comparing, wherein the correction circuit includes, a first capacitor connected between the first and second nodes, and one or more metal lines disposed adjacent to the first capacitor, and wherein at least one other capacitor is formed by the first capacitor and the metal line.

First claim

Opening claim text (preview).

What is claimed is: 1. A correlated double sampling (CDS) circuit comprising: a correction circuit configured to receive an input pixel signal through a first node via a column line, correct the input pixel signal, and output the corrected pixel signal through a second node; and a comparator including a first input terminal and a second input terminal, the first input terminal being connected to the second node and being configured to receive the corrected pixel signal, and the…

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What does patent US8994854B2 cover?
A correlated double sampling (CDS) circuit includes a correction circuit configured to receive an input pixel signal through a first node via a column line, correct the input pixel signal, and output the corrected pixel signal through a second node; and a comparator including first and second input terminals, the first input terminal being connected to the second node and being configured to re…
Who is the assignee on this patent?
Samsung Electronics Co Ltd
What technology area does this patent fall under?
Primary CPC classification H04N25/78. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 31 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).