Array substrate, display panel, spliced display panel and display driving method
US-12033571-B2 · Jul 9, 2024 · US
Image display systems, shift registers and methods for controlling shift register
US8994637B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8994637-B2 |
| Application number | US-201213452621-A |
| Country | US |
| Kind code | B2 |
| Filing date | Apr 20, 2012 |
| Priority date | Apr 25, 2011 |
| Publication date | Mar 31, 2015 |
| Grant date | Mar 31, 2015 |
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Abstract
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An image display system includes a gate driving circuit and a data driving circuit. The gate driving circuit generates gate driving signals to drive pixels in a pixel array. The data driving circuit generates data driving signals to provide data to the pixels. At least one of the gate and data driving circuits includes a shift register. The shift register includes flip-flops coupled in serial. Each flip-flop generates output signals in response to an input signal, and is reset in response to a reset signal. One of the flip-flops receives a first output signal of a last stage flip-flop as the reset signal thereof, and at least one flip-flop following the flip-flop receiving the first output signal of the last stage flip-flop receives a second output signal of the flip-flop receiving the first output signal of the last stage flip-flop as the reset signal thereof.
First claim
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What is claimed is: 1. An image display system, comprising: a gate driving circuit, generating a plurality of gate driving signals to drive a plurality of pixels in a pixel array; and a data driving circuit, generating a plurality of data driving signals to provide data to the pixels of the pixel array, wherein at least one of the gate driving circuit and the data driving circuit comprises: a shift register, comprising a plurality of flip-flops coupled in serial, wherein eac…
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Physics · mapped topic
- G11C19/28Primary
Physics · mapped topic
Physics · mapped topic
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Frequently asked questions
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- What does patent US8994637B2 cover?
- An image display system includes a gate driving circuit and a data driving circuit. The gate driving circuit generates gate driving signals to drive pixels in a pixel array. The data driving circuit generates data driving signals to provide data to the pixels. At least one of the gate and data driving circuits includes a shift register. The shift register includes flip-flops coupled in serial. …
- Who is the assignee on this patent?
- Huang Sheng-Feng, Feng Shih-Chien, Chu Ting-Yao, and 2 more
- What technology area does this patent fall under?
- Primary CPC classification G11C19/28. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue Mar 31 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).