Pixel circuit and display panel
US-2024428730-A1 · Dec 26, 2024 · US
US8994629B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8994629-B2 |
| Application number | US-201213710043-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 10, 2012 |
| Priority date | Sep 27, 2012 |
| Publication date | Mar 31, 2015 |
| Grant date | Mar 31, 2015 |
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Official abstract text for this publication.
According to an embodiment, a gate shift register includes a plurality of stages cascade-connected to each other. An nth one of the stages includes: a pull-up transistor that outputs any one of gate shift clocks as an nth scan pulse of a gate high voltage in accordance with the potential of a Q node; a pull-down transistor that is connected to the pull-up transistor through an output node, and outputs a low-potential voltage as an nth scan pulse of a gate low voltage in accordance with the potential of a QB node; and a switching circuit that charges and discharges the Q node and the QB node, respectively, or vice versa in response to a set signal and a reset signal, wherein an adaptively adjusted variable high-potential voltage is applied to the QB node to correspond to a shift in the threshold voltage of the pull-down transistor.
Opening claim text (preview).
What is claimed is: 1. A display device comprising a gate shift register, the display device comprising: a display panel; a gate shift register comprising a plurality of stages cascade-connected to each other and sequentially supplying scan pulses to scan lines of the display panel; a threshold voltage sensing circuit comprising a monitoring TFT and a detection TFT and outing a sensed voltage; and a VDD regulator circuit that calculates a threshold voltage of a pull-down tra…
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Physics · mapped topic
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