Sampling clock generating circuit and analog to digital converter
US-2017373701-A1 · Dec 28, 2017 · US
US8994569B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8994569-B2 |
| Application number | US-201314023642-A |
| Country | US |
| Kind code | B2 |
| Filing date | Sep 11, 2013 |
| Priority date | Feb 18, 2011 |
| Publication date | Mar 31, 2015 |
| Grant date | Mar 31, 2015 |
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The semiconductor integrated circuit device includes a T-type switch circuit TS[k] that is between an input port A[k] and an input terminal Ain of an analog/digital conversion circuit and that includes first, second, and third PMOS transistors MP 1 , MP 2 , and MPc, and first, second, and third NMOS transistors MN 1 , MN 2 , and MNc; and a fourth PMOS transistor MPu for pre-charging the input terminal Ain to a power supply voltage VCCA. In detecting the presence or absence of a disconnection from the input port A[k] to a signal input terminal Vint[k], first, the input terminal Ain is pre-charged to the power supply voltage VCCA via the fourth PMOS transistor MPu and also the second NMOS transistor MN 2 and the second PMOS transistor MP 2 are turned on, and the first NMOS transistor MN 1 , the first PMOS transistor MP 1 , the third PMOS transistor MPc, and third the NMOS transistor MNc are turned off.
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What is claimed is: 1. A microcontroller, formed over a semiconductor chip, comprising an input port connected to a first power supply voltage via a first resistor and connected to an analog signal input terminal to be measured via a second resistor having a resistance lower than the first resistor; a first MIS transistor of a first conductivity type, wherein a first end of a source/drain is connected to the input port; a second MIS transistor of a second conductivity type, wh…
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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