Semiconductor integrated circuit device

US8994569B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-8994569-B2
Application numberUS-201314023642-A
CountryUS
Kind codeB2
Filing dateSep 11, 2013
Priority dateFeb 18, 2011
Publication dateMar 31, 2015
Grant dateMar 31, 2015

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  1. Title

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  2. Abstract

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  5. First independent claim

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

The semiconductor integrated circuit device includes a T-type switch circuit TS[k] that is between an input port A[k] and an input terminal Ain of an analog/digital conversion circuit and that includes first, second, and third PMOS transistors MP 1 , MP 2 , and MPc, and first, second, and third NMOS transistors MN 1 , MN 2 , and MNc; and a fourth PMOS transistor MPu for pre-charging the input terminal Ain to a power supply voltage VCCA. In detecting the presence or absence of a disconnection from the input port A[k] to a signal input terminal Vint[k], first, the input terminal Ain is pre-charged to the power supply voltage VCCA via the fourth PMOS transistor MPu and also the second NMOS transistor MN 2 and the second PMOS transistor MP 2 are turned on, and the first NMOS transistor MN 1 , the first PMOS transistor MP 1 , the third PMOS transistor MPc, and third the NMOS transistor MNc are turned off.

First claim

Opening claim text (preview).

What is claimed is: 1. A microcontroller, formed over a semiconductor chip, comprising an input port connected to a first power supply voltage via a first resistor and connected to an analog signal input terminal to be measured via a second resistor having a resistance lower than the first resistor; a first MIS transistor of a first conductivity type, wherein a first end of a source/drain is connected to the input port; a second MIS transistor of a second conductivity type, wh…

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What does patent US8994569B2 cover?
The semiconductor integrated circuit device includes a T-type switch circuit TS[k] that is between an input port A[k] and an input terminal Ain of an analog/digital conversion circuit and that includes first, second, and third PMOS transistors MP 1 , MP 2 , and MPc, and first, second, and third NMOS transistors MN 1 , MN 2 , and MNc; and a fourth PMOS transistor MPu for pre-charging the input t…
Who is the assignee on this patent?
Renesas Electronics Corp
What technology area does this patent fall under?
Primary CPC classification H03M1/1076. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 31 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).