Semiconductor integrated circuit and operation method thereof
US-2015378351-A1 · Dec 31, 2015 · US
US8994427B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8994427-B2 |
| Application number | US-201313937424-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jul 9, 2013 |
| Priority date | Jul 9, 2013 |
| Publication date | Mar 31, 2015 |
| Grant date | Mar 31, 2015 |
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A method and apparatus for duty cycle distortion compensation is disclosed. In one embodiment, an integrated circuit includes a differential signal transmitter having a main data path and a compensation data path. The main data path includes a first and second differential driver circuits each having output terminals coupled to a differential output. A transmission controller is configured to transmit data into the main and compensation data paths, the data corresponding to pairs of sequentially transmitted bits including an odd data bit followed by an even data bit, and further configured to determine respective duty cycle widths for each of the odd and even data bits as received by the transmission controller. The transmission controller is configured to cause the first and second driver circuits to equalize the respective duty cycle widths of the odd and even data bits, as transmitted, based their respective duty cycle widths as received.
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What is claimed is: 1. A system comprising: a transmission unit coupled to receive data and configured to serially transmit the data in sequentially transmitted pairs of bits including bits corresponding a first bit received by the transmission unit followed by bits corresponding to a second bit received by the transmission unit, wherein the transmission unit is configured to determine respective duty cycle widths for each of the first and second bits; a main data path coupled t…
Electricity · mapped topic
Electricity · mapped topic
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