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Method and system for synchronizing the phase of a plurality of divider circuits in a local-oscillator signal path
US8994417B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8994417-B2 |
| Application number | US-201414192704-A |
| Country | US |
| Kind code | B2 |
| Filing date | Feb 27, 2014 |
| Priority date | Feb 21, 2012 |
| Publication date | Mar 31, 2015 |
| Grant date | Mar 31, 2015 |
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Abstract
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A method and system for synchronizing the output signal phase of a plurality of frequency divider circuits in a local-oscillator (LO) or clock signal path is disclosed. The LO path includes a plurality of frequency divider circuits and a LO buffer for receiving a LO signal coupled to the plurality of frequency divider circuits. The method and system comprise adding offset voltage and setting predetermined state to each of the frequency divider circuits; and enabling the frequency divider circuits. The method and system includes enabling the LO buffer to provide the LO signal to the frequency divider circuits after they have been enabled. When the LO signal drives each of the frequency divider circuits, each of the frequency divider circuits starts an operation. Finally the method and system comprise removing the offset voltage from each of the frequency divider circuits to allow them to effectively drive other circuits.
First claim
Opening claim text (preview).
What is claimed is: 1. A method for synchronizing the phase of a local-oscillator (LO) signal path, the signal path including a plurality of frequency divider circuits and a local-oscillator (LO) buffer for receiving an LO signal coupled to the plurality of frequency divider circuits the method comprising: adding an offset voltage and setting a predetermined state to each of the plurality of frequency divider circuits prior to enabling the plurality of frequency divider circuits;…
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Classifications
- H03L7/00Primary
Electricity · mapped topic
- H03K23/425Primary
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US8994417B2 cover?
- A method and system for synchronizing the output signal phase of a plurality of frequency divider circuits in a local-oscillator (LO) or clock signal path is disclosed. The LO path includes a plurality of frequency divider circuits and a LO buffer for receiving a LO signal coupled to the plurality of frequency divider circuits. The method and system comprise adding offset voltage and setting pr…
- Who is the assignee on this patent?
- Mediatek Singapore Pte Ltd
- What technology area does this patent fall under?
- Primary CPC classification H03L7/00. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Mar 31 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).