Semiconductor device and method for forming the same
US-2024395669-A1 · Nov 28, 2024 · US
Systems and methods for lowering interconnect capacitance
US8994150B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8994150-B2 |
| Application number | US-201213674535-A |
| Country | US |
| Kind code | B2 |
| Filing date | Nov 12, 2012 |
| Priority date | Jul 4, 2008 |
| Publication date | Mar 31, 2015 |
| Grant date | Mar 31, 2015 |
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- Title
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Abstract
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Methods and apparatus for lowering the capacitance of an interconnect, are disclosed. An example apparatus may include an interconnect formed in at least one integrated circuit and configured to pass a signal through at least a portion of the at least one integrated circuit. The apparatus may include a transmitter to operate at a first voltage and a second voltage, and to output to an end node of the interconnect a reduced swing signal ranging from the first voltage to a third voltage. The third voltage may be between the first and second voltages, and the reduced swing signal may operate to reduce a capacitance of the interconnect when compared to operating the transmitter at the second voltage. Additional apparatus and methods are disclosed.
First claim
Opening claim text (preview).
What is claimed is: 1. An apparatus comprising: an interconnect formed in at least one integrated circuit and configured to pass a signal through at least a portion of the at least one integrated circuit; and a transmitter to operate at a first voltage and a second voltage and to output to an end node of the interconnect a reduced swing signal ranging from the first voltage to a third voltage, the third voltage being between the first and second voltages, the reduced swing signa…
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Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US8994150B2 cover?
- Methods and apparatus for lowering the capacitance of an interconnect, are disclosed. An example apparatus may include an interconnect formed in at least one integrated circuit and configured to pass a signal through at least a portion of the at least one integrated circuit. The apparatus may include a transmitter to operate at a first voltage and a second voltage, and to output to an end node …
- Who is the assignee on this patent?
- Micron Technology Inc
- What technology area does this patent fall under?
- Primary CPC classification H10W20/20. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Mar 31 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).