Dynamic random access memory and method for fabricating the same

Patent metadata

Field	Value
Publication number	US-8994084-B2
Application number	US-201113221538-A
Country	US
Kind code	B2
Filing date	Aug 30, 2011
Priority date	Aug 30, 2011
Publication date	Mar 31, 2015
Grant date	Mar 31, 2015

Abstract

The present invention provides a dynamic random access memory (DRAM) including a plurality of transistors formed in a semiconductor substrate, wherein each of the transistors includes a vertical channel region. A plurality of bit line contained trenches is formed in the semiconductor substrate. Each of the bit line contained trenches comprises two bit lines, and each of the bit lines is electrically connected to an adjacent transistor. Each two sidewalls of each of the bit line contained trenches have a contact formed thereon. A plurality of word lines are formed over the plurality of bit lines and electrical connect to the plurality of transistors. Furthermore, a method for fabricating the DRAM is also provided.

First claim

What is claimed is:

1. A dynamic random access memory, comprising
a plurality of transistors formed in a semiconductor substrate, wherein each of the transistors comprises a vertical channel region;
a plurality of bit line contained trenches formed in the semiconductor substrate, wherein each of the bit line contained trenches comprises two bit lines, and a capping oxide layer sandwiched between the two bit lines to electrically isolate the two bit line from each other, and each…

Assignees

• Lin Chih-Hao
• Winbond Electronics Corp

Inventors

• Lin Chih-Hao

Classifications

• H01L27/10885

  Electricity · mapped topic

• H01L27/10876

  Electricity · mapped topic

• H01L27/10823 Primary

  Electricity · mapped topic

• H01L27/10814

  Electricity · mapped topic

• H10B12/34 Primary

  Electricity · mapped topic