Semiconductor device with low-conducting buried and/or surface layers

Patent metadata

Field	Value
Publication number	US-8994035-B2
Application number	US-201213682139-A
Country	US
Kind code	B2
Filing date	Nov 20, 2012
Priority date	Nov 21, 2011
Publication date	Mar 31, 2015
Grant date	Mar 31, 2015

Abstract

A device including one or more low-conducting layers is provided. A low-conducting layer can be located below the channel and one or more attributes of the low-conducting layer can be configured based on a minimum target operating frequency of the device and a charge-discharge time of a trapped charge targeted for removal by the low-conducting layer or a maximum interfering frequency targeted for suppression using the low-conducting layer. For example, a product of the lateral resistance and a capacitance between the low-conducting layer and the channel can be configured to be larger than an inverse of the minimum target operating frequency and the product can be smaller than at least one of: the charge-discharge time or an inverse of the maximum interfering frequency.

First claim

What is claimed is:

1. A device comprising:
a semiconductor structure including a channel;
a set of contacts to the channel; and
a set of buried low-conducting layers located below the channel in the semiconductor structure, wherein, for each buried low-conducting layer in the set of buried low-conducting layers, a product of a lateral resistance of the buried low-conducting layer and a capacitance between the buried low-conducting layer and the channel is larger than an inver…

Assignees

• Sensor Electronic Tech Inc

Inventors

• Simin Grigory
• Shur Michael
• Gaska Remigijus

Classifications

• H10D62/8503

  Electricity · mapped topic

• G06F30/39 Primary

  Physics · mapped topic

• H10D64/118

  Electricity · mapped topic

• H10D64/27

  Electricity · mapped topic

• H10D62/8325

  Electricity · mapped topic