Semiconductor device
US-2024363707-A1 · Oct 31, 2024 · US
US8993429B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8993429-B2 |
| Application number | US-201314045573-A |
| Country | US |
| Kind code | B2 |
| Filing date | Oct 3, 2013 |
| Priority date | Mar 12, 2013 |
| Publication date | Mar 31, 2015 |
| Grant date | Mar 31, 2015 |
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Official abstract text for this publication.
To form an interconnect conductor structure, a stack of pads, coupled to respective active layers of a circuit, is formed. Rows of interlayer conductors are formed to extend in an X direction in contact with landing areas on corresponding pads in the stack. Adjacent rows are separated from one another in a Y direction generally perpendicular to the X direction. The interlayer conductors in a row have a first pitch in the X direction. The interlayer conductors in adjacent rows are offset in the X direction by an amount less than the first pitch. Interconnect conductors are formed over and in contact with interlayer conductors. The interconnect conductors extend in the Y direction and have a second pitch less than the first pitch.
Opening claim text (preview).
What is claimed is: 1. A method of forming an interconnect conductor structure, comprising: forming a stack of pads coupled to respective active layers of a circuit, the stack of pads having a first side; forming interlayer conductors arranged in rows extending in an X direction in contact with landing areas on corresponding pads in the stack, adjacent rows being separated from one another in a Y direction generally perpendicular to the X direction, the interlayer conductors in…
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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