Semiconductor structure with gate-all-around devices and stacked finfet devices
US-2024186187-A1 · Jun 6, 2024 · US
US8993391B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8993391-B2 |
| Application number | US-201313844900-A |
| Country | US |
| Kind code | B2 |
| Filing date | Mar 16, 2013 |
| Priority date | Dec 27, 2012 |
| Publication date | Mar 31, 2015 |
| Grant date | Mar 31, 2015 |
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A method for fabricating a semiconductor device includes forming a conductive layer over first and second regions of a semiconductor substrate, forming a trench extended in the first region of the semiconductor substrate through the conductive layer, forming a recessed gate electrode in the trench, doping the conductive layer and the recessed first gate electrode, and forming a second gate electrode by etching the doped conductive layer.
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What is claimed is: 1. A method for fabricating a semiconductor device, comprising: forming a conductive layer over first and second regions of a semiconductor substrate; forming a trench extended in the first region of the semiconductor substrate through the conductive layer; forming a first gate electrode in the trench; doping the conductive layer over the first and second regions and the first gate electrode; forming a second gate electrode in the second region by etchi…
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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