Semiconductor device having fin-type field effect transistor and method of manufacturing the same
US-12119351-B2 · Oct 15, 2024 · US
Bulk fin-field effect transistors with well defined isolation
US8993382B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8993382-B2 |
| Application number | US-201314054107-A |
| Country | US |
| Kind code | B2 |
| Filing date | Oct 15, 2013 |
| Priority date | Oct 20, 2011 |
| Publication date | Mar 31, 2015 |
| Grant date | Mar 31, 2015 |
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Abstract
Official abstract text for this publication.
A process fabricates a fin field-effect-transistor by forming a dummy fin structure on a semiconductor substrate. A dielectric layer is formed on the semiconductor substrate. The dielectric layer surrounds the dummy fin structure. The dummy fin structure is removed to form a cavity within the dielectric layer. The cavity exposes a portion of the semiconductor substrate thereby forming an exposed portion of the semiconductor substrate within the cavity. A dopant is implanted into the exposed portion of the semiconductor substrate within the cavity thereby creating a dopant implanted exposed portion of the semiconductor substrate within the cavity. A semiconductor layer is epitaxially grown within the cavity atop the dopant implanted exposed portion of the semiconductor substrate.
First claim
Opening claim text (preview).
The invention claimed is: 1. A method for forming a fin field-effect-transistor, the method comprising: forming a dummy fin structure on a semiconductor substrate; forming a dielectric layer on the semiconductor substrate, the dielectric layer surrounding the dummy fin structure; removing the dummy fin structure so that a cavity is formed within the dielectric layer, wherein the cavity exposes a portion of the semiconductor substrate thereby forming an exposed portion of the s…
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Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
- H10D30/0243Primary
Electricity · mapped topic
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Frequently asked questions
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- What does patent US8993382B2 cover?
- A process fabricates a fin field-effect-transistor by forming a dummy fin structure on a semiconductor substrate. A dielectric layer is formed on the semiconductor substrate. The dielectric layer surrounds the dummy fin structure. The dummy fin structure is removed to form a cavity within the dielectric layer. The cavity exposes a portion of the semiconductor substrate thereby forming an expose…
- Who is the assignee on this patent?
- IBM
- What technology area does this patent fall under?
- Primary CPC classification H10D30/0243. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Mar 31 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).