Package substrate and semiconductor package including the same
US-2024429153-A1 · Dec 26, 2024 · US
US8993379B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8993379-B2 |
| Application number | US-201313968125-A |
| Country | US |
| Kind code | B2 |
| Filing date | Aug 15, 2013 |
| Priority date | Jan 21, 2013 |
| Publication date | Mar 31, 2015 |
| Grant date | Mar 31, 2015 |
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A method of forming a chip stack is provided and includes arraying solder pads along a plane of a major surface of a substrate forming walls of electrically insulating material between adjacent ones of the solder pads.
Opening claim text (preview).
What is claimed is: 1. A method of forming a chip stack, comprising: arraying solder pads along a plane of a major surface of a substrate, the solder pads each having an outer surface disposed outwardly from a conductor and above insulators and an inner surface recessed from the outer surface and disposed in contact with the conductor; and forming walls of electrically insulating material between adjacent ones of the solder pads such that the walls extend from uppermost surfaces…
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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