Photodetection device and electronic device
US-2024355853-A1 · Oct 24, 2024 · US
Solid-state imaging device and method for manufacturing the same
US8993369B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8993369-B2 |
| Application number | US-201113181630-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jul 13, 2011 |
| Priority date | Nov 4, 2003 |
| Publication date | Mar 31, 2015 |
| Grant date | Mar 31, 2015 |
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Abstract
Official abstract text for this publication.
A method for manufacturing a solid-state imaging device in which: photo sensor portions are formed in a silicon layer over a substrate, a first conductivity type region being included in the photo sensor portions and a second conductivity type region being formed in the silicon layer implanted from a rear-surface of the solid-state imaging device by ion implantation; a wiring portion is formed above the silicon layer; and a supporting substrate is bonded to the wiring portion, wherein, the solid-state imaging device is configured for receiving incident light via the rear-surface of the solid-state imaging device.
First claim
Opening claim text (preview).
What is claimed is: 1. A method for manufacturing a solid-state imaging device comprising: forming photo sensor portions each having a first conductivity type and a depth in a thickness direction of a silicon layer that is greater than a width, the width being perpendicular to the depth, wherein the silicon layer has oppositely facing front and rear surfaces and the photo sensor portions are configured to receive incident light; forming second conductivity types adjacent to each…
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Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US8993369B2 cover?
- A method for manufacturing a solid-state imaging device in which: photo sensor portions are formed in a silicon layer over a substrate, a first conductivity type region being included in the photo sensor portions and a second conductivity type region being formed in the silicon layer implanted from a rear-surface of the solid-state imaging device by ion implantation; a wiring portion is formed …
- Who is the assignee on this patent?
- Maruyama Yasushi, Abe Hideshi, Mori Hiroyuki, and 1 more
- What technology area does this patent fall under?
- Primary CPC classification H10F39/182. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Mar 31 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).