Automatic compilation method and framework for generating a layout of integrated memory-compute circuit
US-2024403527-A1 · Dec 5, 2024 · US
Automated circuit design
US8990743B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8990743-B2 |
| Application number | US-201213434755-A |
| Country | US |
| Kind code | B2 |
| Filing date | Mar 29, 2012 |
| Priority date | May 30, 2003 |
| Publication date | Mar 24, 2015 |
| Grant date | Mar 24, 2015 |
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- Title
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Abstract
Official abstract text for this publication.
Methods and apparatuses to automatically modify a circuit design (e.g., a synthesis solution) according to the sensitivity in design parameters with respect to the possible deviation in the subsequent implementation (e.g., placement and routing) of the circuit. In one aspect of the present invention, a method to design a circuit includes: determining likelihood of a design constraint being violated in an implementation of a first circuit design (e.g., a technology specific netlist with or without a placement solution); and, modifying the first circuit design to reduce the likelihood of the design constraint being violated. In one example, the implementation of the first circuit design includes a routing solution for implementing the first circuit design; and, the first circuit is modified through sizing an instance of a logic element, buffering a signal, load shielding for a signal, or other operations.
First claim
Opening claim text (preview).
What is claimed is: 1. A method to design a circuit, the method comprising: estimating one or more design constraint parameters for a first circuit design; determining one or more indicators that represent a probability of violation in the one or more design constraint parameters in a second circuit design, the second circuit design comprising a placement solution, a routing solution, or a combination thereof for the first circuit design; and modifying the first circuit design…
Assignees
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Classifications
- G06F30/327Primary
Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
- G06F30/3312Primary
Physics · mapped topic
Physics · mapped topic
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Frequently asked questions
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- What does patent US8990743B2 cover?
- Methods and apparatuses to automatically modify a circuit design (e.g., a synthesis solution) according to the sensitivity in design parameters with respect to the possible deviation in the subsequent implementation (e.g., placement and routing) of the circuit. In one aspect of the present invention, a method to design a circuit includes: determining likelihood of a design constraint being viol…
- Who is the assignee on this patent?
- Ramachandran Champaka, Crews Andrew, Mcelvain Kenneth S, and 1 more
- What technology area does this patent fall under?
- Primary CPC classification G06F30/327. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue Mar 24 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).