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US-2015378911-A1 · Dec 31, 2015 · US
Selective posted data error detection based on request type
US8990640B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8990640-B2 |
| Application number | US-201213679549-A |
| Country | US |
| Kind code | B2 |
| Filing date | Nov 16, 2012 |
| Priority date | Nov 16, 2012 |
| Publication date | Mar 24, 2015 |
| Grant date | Mar 24, 2015 |
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Abstract
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In a data processing system, a selection is made, based at least on an access type of a memory access request, between at least a first timing and a second timing of data transmission with respect to completion of error detection processing on a target memory block of the memory access request. In response to receipt of the memory access request and selection of the first timing, data from the target memory block is transmitted to a requestor prior to completion of error detection processing on the target memory block. In response to receipt of the memory access request and selection of the second timing, data from the target memory block is transmitted to the requestor after and in response to completion of error detection processing on the target memory block.
First claim
Opening claim text (preview).
What is claimed is: 1. A memory subsystem of a data processing system, comprising: an error detection circuit; and control logic coupled to system memory, wherein the control logic receives a memory access request and selects, based at least on an access type specified by the memory access request, between at least a first timing and a second timing of data transmission with respect to completion of error detection processing by the error detection circuit on a target memory blo…
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- G06F9/3824Primary
Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
- G06F11/006Primary
Physics · mapped topic
Physics · mapped topic
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Frequently asked questions
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- What does patent US8990640B2 cover?
- In a data processing system, a selection is made, based at least on an access type of a memory access request, between at least a first timing and a second timing of data transmission with respect to completion of error detection processing on a target memory block of the memory access request. In response to receipt of the memory access request and selection of the first timing, data from the …
- Who is the assignee on this patent?
- IBM
- What technology area does this patent fall under?
- Primary CPC classification G06F9/3824. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue Mar 24 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).