Storage device caching update target data unit while entering down-time mode and operating method of the storage device
US-2024345740-A1 · Oct 17, 2024 · US
US8990506B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8990506-B2 |
| Application number | US-63919109-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 16, 2009 |
| Priority date | Dec 16, 2009 |
| Publication date | Mar 24, 2015 |
| Grant date | Mar 24, 2015 |
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In one embodiment, the present invention includes a cache memory including cache lines that each have a tag field including a state portion to store a cache coherency state of data stored in the line and a weight portion to store a weight corresponding to a relative importance of the data. In various implementations, the weight can be based on the cache coherency state and a recency of usage of the data. Other embodiments are described and claimed.
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What is claimed is: 1. A processor comprising: a cache memory comprising an adaptive shared cache memory comprising a plurality of banks each to be associated with a corresponding core and to provide private cache storage and shared cache storage, the cache memory including a plurality of cache lines each having a data field to store data and a tag field including a state portion to store a cache coherency state of the corresponding data and a weight portion to store a weight corr…
Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
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