Semiconductor memory device and computer program product

Patent metadata

Field	Value
Publication number	US-8990480-B2
Application number	US-201213586219-A
Country	US
Kind code	B2
Filing date	Aug 15, 2012
Priority date	Mar 15, 2012
Publication date	Mar 24, 2015
Grant date	Mar 24, 2015

Abstract

According an embodiment, a semiconductor memory device includes a semiconductor memory chip to store plural pieces of data that are written and read in units of a page and are erased in units of a block including plural pages; a discarding unit to discard, after the data is written in the semiconductor memory chip with a logic address being designated, at least a portion of valid data among the plural pieces of data; a compaction unit to write the valid data excluding the discarded data in a second block among the valid data stored in a first block and erase the first block; and a controller to output, in response to a request for reading the discarded data, a response indicating that the data is unable to be read. When all the valid data included in a block are discarded, the discarding unit erases the block.

First claim

What is claimed is:

1. A semiconductor memory device comprising:
a semiconductor memory chip configured to store therein a plurality of pieces of data, the semiconductor memory chip being a chip in which data is written and from which data is read in units of a page that is a storage area having a predetermined size, and from which data is erased in units of a block including a plurality of pages;
a discarding unit configured to, after a piece of the plurality of pieces of the d…

Assignees

• Kanno Shinichi
• Fukutomi Kazuhiro
• Toshiba Kk

Inventors

• Kanno Shinichi
• Fukutomi Kazuhiro

Classifications

• G06F2212/7205

  Physics · mapped topic

• G06F12/0246 Primary

  Physics · mapped topic