Configurable system for performing repetitive actions

US8990280B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-8990280-B2
Application numberUS-59910606-A
CountryUS
Kind codeB2
Filing dateNov 14, 2006
Priority dateSep 30, 2005
Publication dateMar 24, 2015
Grant dateMar 24, 2015

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  5. First independent claim

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Abstract

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In some embodiments, a data processing system including an operation unit including circuitry configurable to perform any selected one of a number of operations on data (e.g., audio data) and a configuration unit configured to assert configuration information to configure the operation unit to perform the selected operation. When the operation includes matrix multiplication of a data vector and a matrix whose coefficients exhibit symmetry, the configuration information preferably includes bits that determine signs of all but magnitudes of only a subset of the coefficients. When the operation includes successive addition and subtraction operations on operand pairs, the configuration information preferably includes bits that configure the operation unit to operate in an alternating addition/subtraction mode to perform successive addition and subtraction operations on each pair of data values of a sequence of data value pairs.

First claim

Opening claim text (preview).

What is claimed is: 1. A system comprising: an operation unit comprising circuitry configurable to perform a number of operations on audio data, the number of operations comprising a first matrix multiplication of a first vector and a first matrix during a pre-modulation phase, a second matrix multiplication of a second vector and a second matrix during an inverse Fast Fourier Transform, and a third matrix multiplication of a third vector and a third matrix during a post-modulatio…

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What does patent US8990280B2 cover?
In some embodiments, a data processing system including an operation unit including circuitry configurable to perform any selected one of a number of operations on data (e.g., audio data) and a configuration unit configured to assert configuration information to configure the operation unit to perform the selected operation. When the operation includes matrix multiplication of a data vector and…
Who is the assignee on this patent?
Sriram Partha, Quan Robert, Gnanapa Bhagawan Reddy, and 2 more
What technology area does this patent fall under?
Primary CPC classification G06F17/147. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Mar 24 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).