Learning Based Service for Generating Random Numbers
US-2024411522-A1 · Dec 12, 2024 · US
US8990276B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8990276-B2 |
| Application number | US-81236108-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 11, 2008 |
| Priority date | Jan 11, 2008 |
| Publication date | Mar 24, 2015 |
| Grant date | Mar 24, 2015 |
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
What the patent document calls the invention.
A short plain-language summary of the technical disclosure.
Who owns or filed the patent and who is credited as inventor.
Filing, priority, publication, and grant dates set the timeline.
The legal scope of protection — read this for what is actually claimed.
Technology tags used to group this patent with similar filings.
Prior art links and similar publications in this corpus.
Official abstract text for this publication.
The invention relates to a circuit for generating a true, circuit-specific and time-invariant random binary number, having: a matrix of K−L delay elements that can be connected to each other by means of L−1 single or double commutation circuits into chains of delay elements of length L, a single or double demultiplexer connected before the matrix, a single or double multiplexer connection after the matrix, and a run time or number comparator, wherein the setting of the commutation circuits, the demultiplexer, and the multiplexer can be prescribed by a control signal, wherein the circuit comprises a channel code encoder whereby code words of a channel code can be generated and a transcriber, whereby code words of the channel code can be transcribed into the control signal of the L−1 single or double commutation circuits, and a method for generating a true, circuit-specific and time-invariant random number by means of a matrix of L−K delay elements, L−1 single or double commutation circuits, a single or double demultiplexer connected before the matrix, a single or double multiplexer connection after the matrix, and a run time or number comparator, comprising at least the steps a) generating a code word of a channel code, b) transcribing a code word of a channel code to a selection code, c) generating chains of L delay elements by setting a setting corresponding to the code word of the selection code for the L−1 single or double commutation circuits, the single or double demultiplexer, and the single or double multiplexer, d) pairwise comparing of two variables determined by the delay times of two chains defined by the setting of the L−1 commutation circuits corresponding to the code word of the channel code, by means of a number or delay comparator for generating a bit of the true, circuit-specific and time-invariant random number.
Opening claim text (preview).
What is claimed is: 1. A circuit for generating a true, circuit-specific, time-invariant, binary random number, comprising: a matrix of K·L delay elements, which are interconnectable to form chains of delay elements of length L via L−1 commutation circuits, each chain including L delay elements and the L−1 commutation circuits each provided between two adjacent delay elements among the L delay elements, each commutation circuit having K input signals and K output signals thereby e…
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Physics · mapped topic
Electricity · mapped topic
Related publications grouped by family.
Free tools are coming soon. Tell us what you want to track and we'll notify you.
Answers are generated from the same data shown on this page.