Consolidating multiple neurosynaptic cores into one memory

Patent metadata

Field	Value
Publication number	US-8990130-B2
Application number	US-201213683234-A
Country	US
Kind code	B2
Filing date	Nov 21, 2012
Priority date	Nov 21, 2012
Publication date	Mar 24, 2015
Grant date	Mar 24, 2015

Abstract

Embodiments of the invention relate to a neural network system comprising a single memory block for multiple neurosynaptic core modules. One embodiment comprises a neural network system including a memory array that maintains information for multiple neurosynaptic core modules. Each neurosynaptic core module comprises multiple neurons. The neural network system further comprises at least one logic circuit. Each logic circuit receives neuronal firing events targeting a neurosynaptic core module of the neural network system, and said logic circuit integrates the firing events received based on information maintained in said memory for said neurosynaptic core module.

First claim

What is claimed is:

1. A neural network system, comprising:
a memory array that maintains information for multiple neurosynaptic core modules, wherein each neurosynaptic core module comprises multiple neurons; and
at least one logic circuit, wherein each logic circuit:
receives neuronal firing events targeting a neurosynaptic core module of the neural network system; and
integrates the firing events received based on information maintained in said memory array for said neuros…

Assignees

• IBM

Inventors

• Alvarez-Icaza Rivera Rodrigo
• Arthur John V
• Cassidy Andrew S
• Merolla Paul A
• Modha Dharmendra S

Classifications

• G06N3/04 Primary

  Physics · mapped topic

• G06N3/063

  Physics · mapped topic

• G06N3/0495

  Physics · mapped topic