Semiconductor memory device, memory system including the same and operating method thereof
US-9214239-B2 · Dec 15, 2015 · US
US8988941B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8988941-B2 |
| Application number | US-201313801800-A |
| Country | US |
| Kind code | B2 |
| Filing date | Mar 13, 2013 |
| Priority date | Dec 18, 2012 |
| Publication date | Mar 24, 2015 |
| Grant date | Mar 24, 2015 |
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In a nonvolatile memory array in which a select transistor includes a charge storage element, the threshold voltage of the select transistor is monitored, and if the threshold voltage deviates from a desired threshold voltage range, charge is added to, or removed from the charge storage element to return the threshold voltage to the desired threshold voltage range.
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It is claimed: 1. A three dimensional charge-storage memory formed in multiple physical levels disposed above a substrate comprising: a plurality of NAND strings that extend in a direction that is perpendicular to a surface of a substrate, each of the plurality of NAND strings having a select transistor at each end; a plurality of select lines that are connected to gates of the select transistors to selectively connect the plurality of strings to conductive lines; resolving ci…
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