Pre-charge during programming for 3D memory using gate-induced drain leakage

Patent metadata

Field	Value
Publication number	US-8988939-B2
Application number	US-201414278351-A
Country	US
Kind code	B2
Filing date	May 15, 2014
Priority date	Oct 24, 2012
Publication date	Mar 24, 2015
Grant date	Mar 24, 2015

Abstract

In a programming operation of a 3D stacked non-volatile memory device, the channel of an inhibited NAND string is pre-charged by gate-induced drain leakage (GIDL) to achieve a high level of boosting which prevents program disturb in inhibited storage elements. In a program-verify iteration, prior to applying a program pulse, the drain-side select gate transistor is reverse biased to generate GIDL, causing the channel to be boosted to a pre-charge level such as 1.5V. Subsequently, when the program pulse is applied to a selected word line and pass voltages are applied to unselected word lines, the channel is boosted higher from the pre-charge level due to capacitive coupling. The pre-charge is effective even for a NAND string that is partially programmed because it does not rely on directly driving the channel from the bit line end.

First claim

What is claimed is:

1. A non-volatile memory device, comprising:
a substrate;
a first set of memory cells which is selected for programming and comprises a channel of an active area, the first set of memory cells is formed above the substrate in multiple physical levels of memory cells in a three-dimensional non-volatile memory, the active area comprises a pillar which extends vertically in the three-dimensional non-volatile memory, the first set of memory cells comprises a sele…

Assignees

• Sandisk Technologies Inc

Inventors

• Dunga Mohan
• Dong Yingda
• Ou Wendy

Classifications

• G11C16/3427

  Physics · mapped topic

• G11C2213/71

  Physics · mapped topic

• G11C16/0483

  Physics · mapped topic

• G11C16/12 Primary

  Physics · mapped topic

• G11C16/10

  Physics · mapped topic