System control using sparse data
US-12072810-B2 · Aug 27, 2024 · US
US8988933B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8988933-B2 |
| Application number | US-201213606793-A |
| Country | US |
| Kind code | B2 |
| Filing date | Sep 7, 2012 |
| Priority date | Mar 22, 2012 |
| Publication date | Mar 24, 2015 |
| Grant date | Mar 24, 2015 |
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A non-volatile semiconductor memory device that can reduce power consumption includes plural memory banks containing nonvolatile plural memory cells. A common data bus is shared by plural memory banks and transmits the data of the memory cells. The plural switches are provided respectively between the electric source and plural memory banks. A controller controls the plural switches. The controller, in the data reading-out action or the data writing-in action, makes at least one of the switches corresponding to at least one of the memory banks accessible in a conduction state, and other switches in a non-conduction state.
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What is claimed is: 1. A semiconductor memory device comprising: a plurality of memory banks each containing nonvolatile memory cells; and a plurality of switches provided between a power source and the plurality of memory banks, such that each of the memory banks can be selectively connected and disconnected to the power source by operation of the plurality of switches; and a controller controlling the plurality of switches according to a state of the memory device.…
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