Multiple E-carrier transport over DSL

Patent metadata

Field	Value
Publication number	US-8982913-B2
Application number	US-46855209-A
Country	US
Kind code	B2
Filing date	May 19, 2009
Priority date	May 22, 2008
Publication date	Mar 17, 2015
Grant date	Mar 17, 2015

Abstract

A communication system comprises a first multiplexer card having a first plurality of TDM ports and a first differential signaling interface, the first multiplexer card operable to map timeslots from the TDM ports to a first combined signal transmitted via the first differential signaling interface; a first unit coupled to the first differential signaling interface and configured to map timeslots extracted from the first combined signal to a DSL frame; a second unit coupled to the first unit via the a DSL link, the second unit having a third differential signaling interface and operable to map timeslots extracted from the DSL frame to a second combined signal; and a second multiplexer card having a second plurality of TDM ports and a fourth differential signaling interface, the second multiplexer card operable to map each of the timeslots from the second combined signal to one of the second plurality of TDM ports.

First claim

What is claimed is:

1. A communication system comprising:
a first multiplexer card having a first plurality of time division multiplex (TDM) ports and a first differential signaling interface, wherein the first multiplexer card is operable to map timeslots from each of the first plurality of TDM ports to a first combined signal transmitted via the first differential signaling interface;
a first unit with circuit separate from and coupled to the first multiplexer card, the first unit having a second differential signaling interface coupled to the first differential signaling interface, wherein the first unit is operable to extract the timeslots from the first combined signal based on a timeslot map that is used for calculating a data rate of the second differential signaling interface and to map the extracted timeslots to a digital subscriber line (DSL) frame for transmission over a DSL link;
a second unit with circuit coupled to the first unit via the DSL link, the second unit having a third differential signaling interface, wherein the second unit is operable to extract the timeslots in the DSL frame and to map the timeslots to a second combined signal transmitted via the third differential signaling interface; and
a second multiplexer card separate from and coupled to the second unit, the second multiplexer card having a second plurality of TDM ports and a fourth differential signaling interface coupled to the third differential signaling interface, wherein the second multiplexer card is operable to map each of the timeslots from the second combined signal to one of the second plurality of TDM ports˜
wherein a TDM port is a port configured to transmit and receive signal configured according to one of an E-carrier protocol and a T-carrier protocol;
wherein the first unit is located in a first location and the second unit is located in a second location different from the first location.

2. The communication system of claim 1 , wherein each TDM port of the first and second plurality of TDM ports is configured to transmit and receive TDM frames according to the International Telecommunications Union (ITU) G.703 standard.

3. The communication system of claim 1 , wherein each TDM port of the first and second plurality of TDM ports is configured for one of structured and unstructured operation.

4. The communication system of claim 1 , wherein at least one TDM port of each of the first and second plurality of TDM ports is configured to transmit and receive fractional TDM frames.

5. The communication system of claim 1 , wherein each differential signaling interface is configured according to the International Telecommunication Union (ITU) V.35 standard.

6. The communication system of claim 1 , wherein each of the first multiplexer card, the first unit, the second unit, and the second multiplexer cards are operable to insert High-level Data Link Control (HDLC) flags at the beginning and end of each combined signal transmitted over the respective differential signaling interfaces.

7. The communication system of claim 1 , wherein each of the first multiplexer card, the first unit, the second unit, and the second multiplexer card are operable to transmit a request to send (RTS) signal over the differential signaling interface and to wait for a clear to send (CTS) in response to the RTS signal prior to transmitting each combined signal over the respective differential signaling interfaces.

8. The communication system of claim 1 , wherein each of the first unit and the second unit include a TDM port and an Ethernet port; wherein each of the first unit and the second unit are further operable to map timeslots from the TDM port and the Ethernet port to the DSL frame.

9. The communication system of claim 1 , wherein the first unit and the second unit are configured according to the Global.Standard High-Bit-Rate Digital Subscriber Line (G.SHDSL) standard.

10. The communication system of claim 1 , wherein the first unit and the second unit are operable to map timeslots to a DSL frame by interleaving the timeslots between a first DSL frame on a first DSL pair and a second DSL frame on a second DSL pair.

11. A multiplexer card comprising:
a plurality of time division multiplex (TDM) ports, wherein a TDM port is a port configured to transmit and receive signals configured according to one of an E-carrier protocol and a T-carrier protocol;
an unframed differential signaling interface; and
a logic unit with circuit operable to map timeslots from each of the plurality of TDM ports to a combined continuous data stream transmitted via the differential signaling interface based on a timeslot map that is used for calculating a data rate of the differential signaling interface; and to map each timeslot in a continuous data stream received over the differential signaling interface to one of the plurality of TDM ports;
wherein the continuous data stream contains a stream of bytes without explicit frame delineation inherent in the stream of bytes.

12. The multiplexer card of claim 11 , wherein the logic unit comprises one of a field programmable gate array (FPGA), a field programmable object array (FPOA), a digital signal processor (DSP), and a complex programmable logic device (CPLD).

13. The multiplexer card of claim 11 , wherein each of the plurality of TDM ports is configured to transmit and receive TDM frames according to the International Telecommunications Union (ITU) G.703 standard.

14. The multiplexer card of claim 11 , wherein each of the plurality of TDM ports is configured for one of structured and unstructured operation.

15. The multiplexer card of claim 11 , wherein at least one of the TDM ports is configured to transmit and receive fractional TDM frames.

16. The multiplexer card of claim 11 , wherein the differential signaling interface is configured according to the International Telecommunication Union (ITU) V.35 standard.

17. The multiplexer card of claim 11 , wherein the logic unit is operable to insert High-level Data Link Control (HDLC) flags at the beginning and end of the combined signal.

18. The multiplexer card of claim 11 , wherein the logic unit is operable to transmit a request to send (RTS) signal over the differential signaling interface and to wait for a clear to send (CTS) in response to the RTS signal prior to transmitting the combined signal over the differential signaling interface.

19. A method of transporting signals from a plurality of time division multiplex (TDM) ports over a digital subscriber line (DSL) link, wherein a TDM port is a port configured to transmit and receive signals configured according to one of an E-carrier protocol and a T-carrier, the method comprising:
mapping at least one timeslot from each of the plurality of TDM ports to a first combined signal in a first multiplexer card based on a timeslot map that is used for calculating a data rate of a differential signaling interface;
transmitting the first combined signal to a first unit via the differential signaling interface in the first multiplexer card, wherein the first unit is separate from and coupled to the first multiplexer card, the first unit located in a first location;
mapping the first combined signal to timeslots in a DSL frame at the first unit;
transmitting the DSL frame over the DSL link to a second unit, the second unit located in a second location different from the first location;
extracting the DSL timeslots, which correspond to the timeslots from the plurality of TDM ports in the first multiplexer card, from the DSL frame at the second uni

Assignees

• Zhou Xinkuan
• Powers Clifton
• Anne Laxman
• Sharma Manish
• Polland Joe
• Adc Telecommunications Inc

Inventors

• Zhou Xinkuan
• Powers Clifton
• Anne Laxman
• Sharma Manish
• Polland Joe

Classifications

• H04J3/1641

  Hierarchical systems · CPC title

• H04J3/1647 Primary

  Subrate or multislot multiplexing · CPC title

• H04J3/04

  Distributors combined with modulators or demodulators {(pulse distributors in general H03K5/15; pulse counters H03K21/00 - H03K29/06; for telegraphy H04L5/22, H04L13/00 - H04L23/00, H04L25/45; for telephony H04Q11/04)} · CPC title