Network reconfiguration in a data converter for improved electrical characteristics

Patent metadata

Field	Value
Publication number	US-8978005-B2
Application number	US-201313911720-A
Country	US
Kind code	B2
Filing date	Jun 6, 2013
Priority date	Jun 6, 2013
Publication date	Mar 10, 2015
Grant date	Mar 10, 2015

Abstract

A process of optimizing a resistor-2 resistor (R-2R) digital-to-analog converter (DAC) by partial resistor network reconfiguration is disclosed. The method includes analyzing a circuit to determine whether any specifications are outside predetermined limits. The method further includes determining one or more addresses that cause the circuit to be outside of the predetermined limits. The method further includes defining logic to detect address information and control function to alter the circuit to improve the specifications. The method further includes installing the control function into the circuit to improve the specifications.

First claim

What is claimed is:

1. A method implemented in computing infrastructure, comprising
analyzing a circuit to determine whether any specifications are outside predetermined limits and whether one or more addresses exist that have yet to be analyzed;
determining whether at least one of the one or more addresses cause the circuit to be outside of the predetermined limits;
defining logic to detect address information and a control function to alter the circuit to improve the specifi…

Assignees

• IBM

Inventors

• Iadanza Joseph A

Classifications

• G06F30/327 Primary

  Physics · mapped topic

• G06F30/36 Primary

  Physics · mapped topic

• G06F17/505 Primary

  Physics · mapped topic

• G06F30/373

  Physics · mapped topic