Deep learning inference efficiency technology with early exit and speculative execution
US-2024104916-A1 · Mar 28, 2024 · US
US8977997B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8977997-B2 |
| Application number | US-201313842174-A |
| Country | US |
| Kind code | B2 |
| Filing date | Mar 15, 2013 |
| Priority date | Mar 15, 2013 |
| Publication date | Mar 10, 2015 |
| Grant date | Mar 10, 2015 |
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Systems and methods of using hardware to simulate software, specifically the semantic operations defined in HDL simulation languages. Traditional software HDL simulation kernel operations of advancing time, activating threads in response to notified events, and scheduling those threads of execution are handled via a simulation controller. The simulation controller is comprised of a timing wheel, an event-processor, a thread/process dispatch engine, a token processor, and a resource-allocator. These components work together with a control logic component to perform the semantic operations of an HDL software kernel.
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What is claimed as new and desired to be protected by Letters Patent of the United States is: 1. A simulation system for simulating a hardware description language (HDL), comprising: a controller that comprises: a time wheel module comprising a plurality of physical queues to which virtual queues that represent an HDL simulator description are mapped; and control logic which controls the mapping of the virtual queues to physical queues to represent an advancement of time; and…
Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
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