Electrically erasable programmable memory device that generates a cyclic redundancy check (CRC) code
US-9213591-B1 · Dec 15, 2015 · US
US8977927B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8977927-B2 |
| Application number | US-77861810-A |
| Country | US |
| Kind code | B2 |
| Filing date | May 12, 2010 |
| Priority date | May 13, 2009 |
| Publication date | Mar 10, 2015 |
| Grant date | Mar 10, 2015 |
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An error-correction coding method that includes outer coding of performing a coding process for an outer code; and inner coding of performing a coding process for an inner code that has an error correction capability adjusted based on an error correction capability of the outer code.
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What is claimed is: 1. An error-correction coding method for achieving a desired bit error ratio (BER) of BERod after error correction of data transmitted via a channel, which has a BER of BERib, the method comprising the steps of: performing a coding process for an outer code interleaved to a depth of No bits, wherein the outer code has an error correction capability of reducing BER by a difference between BERob and BERod, and wherein BERob represents a BER by which an error corr…
Electricity · mapped topic
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