Program verify word line ramping delay for lower current consumption mode
US-2024395343-A1 · Nov 28, 2024 · US
US8976599B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8976599-B2 |
| Application number | US-201313872379-A |
| Country | US |
| Kind code | B2 |
| Filing date | Apr 29, 2013 |
| Priority date | Jun 10, 2010 |
| Publication date | Mar 10, 2015 |
| Grant date | Mar 10, 2015 |
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A method of programming a nonvolatile memory device comprises programming target memory cells among a plurality of memory cells connected to a wordline, performing a first sensing operation on the plurality of memory cells, and selectively performing a second sensing operation on the target memory cells based on a result of the first sensing operation.
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What is claimed is: 1. A method of programming a nonvolatile memory device using a plurality of program loops, comprising: programming target memory cells among a plurality of memory cells connected to a wordline in a present program loop, the plurality of memory cells including the target memory cells and other memory cells; performing a first sensing operation on both the target memory cells and the other memory cells in the present program loop; and selectively performing a…
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