Program verify word line ramping delay for lower current consumption mode
US-2024395343-A1 · Nov 28, 2024 · US
Memory read apparatus and methods
US8976594B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8976594-B2 |
| Application number | US-201213471539-A |
| Country | US |
| Kind code | B2 |
| Filing date | May 15, 2012 |
| Priority date | May 15, 2012 |
| Publication date | Mar 10, 2015 |
| Grant date | Mar 10, 2015 |
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- Title
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Abstract
Official abstract text for this publication.
Apparatus and methods are disclosed, including a method that raises an electrical potential of a plurality of access lines to a raised electrical potential, where each access line is associated with a respective charge storage device of a string of charge storage devices. The electrical potential of a selected one of the access lines is lowered, and a data state of the charge storage device associated with the selected access line is sensed while the electrical potential of the selected access line is being lowered. Additional apparatus and methods are described.
First claim
Opening claim text (preview).
What is claimed is: 1. A method comprising: raising an electrical potential of a plurality of access lines to a raised electrical potential, each access line associated with a charge storage device; lowering the electrical potential of a selected one of the access lines; and sensing a state of the charge storage device associated with the selected access line while the electrical potential of the selected access line is being lowered. 2. The method of cl…
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Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
- G11C16/26Primary
Physics · mapped topic
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Frequently asked questions
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- What does patent US8976594B2 cover?
- Apparatus and methods are disclosed, including a method that raises an electrical potential of a plurality of access lines to a raised electrical potential, where each access line is associated with a respective charge storage device of a string of charge storage devices. The electrical potential of a selected one of the access lines is lowered, and a data state of the charge storage device ass…
- Who is the assignee on this patent?
- Tanzawa Toru, Micron Technology Inc
- What technology area does this patent fall under?
- Primary CPC classification G11C16/26. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue Mar 10 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).