Memory performance evaluation using address mapping information
US-2024394164-A1 · Nov 28, 2024 · US
US8976589B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8976589-B2 |
| Application number | US-201313925017-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jun 24, 2013 |
| Priority date | Mar 14, 2013 |
| Publication date | Mar 10, 2015 |
| Grant date | Mar 10, 2015 |
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According to one embodiment, a storage device includes a nonvolatile memory and a controller. The nonvolatile memory includes blocks which store data. Each of the blocks is an erase unit. The controller controls an operation of the nonvolatile memory. The controller executes writes and erases with respect to a first block of the blocks in the nonvolatile memory for the first number of times during a first period. The controller executes writes and erases with respect to other blocks for the second number of times smaller than the first number of times during the first period.
Opening claim text (preview).
What is claimed is: 1. A storage device comprising: a nonvolatile memory including blocks which store data, each of the blocks being an erase unit; a storage unit which stores the number of writes relative to each of the blocks in the nonvolatile memory, the number of writes being the number of times that each of the blocks is written; a storage unit which stores a handicap obtained for each of the blocks in the nonvolatile memory, the handicap being obtained by subtracting th…
Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
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