Program verify word line ramping delay for lower current consumption mode
US-2024395343-A1 · Nov 28, 2024 · US
US8976587B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8976587-B2 |
| Application number | US-201313737140-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jan 9, 2013 |
| Priority date | Mar 9, 2010 |
| Publication date | Mar 10, 2015 |
| Grant date | Mar 10, 2015 |
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The operating method of a data storage device includes storing data in a buffer memory according to an external request, and determining whether the data stored in the buffer memory is data accompanying a buffer program operation of a memory cell array. When the data stored in the buffer memory is data accompanying the buffer program operation, the method further includes determining whether a main program operation on the memory cell array is required, and when a main program operation on the memory cell array is required, determining a program pattern of the main program operation on the memory cell array. The method further includes issuing a set of commands for the main program operation on the memory cell array to a multi-bit memory device based on the determined program pattern.
Opening claim text (preview).
What is claimed is: 1. A method of operating a data storage system comprising a controller including a buffer memory, and a non-volatile memory including a memory cell array divided into a first region and a second region, the method comprising: receiving first page data from the buffer memory and programming the first page data to first memory cells connected to a first word line in the first region using a buffer program operation and receiving second page data from the buffer m…
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