Logic drive using standard commodity programmable logic ic chips comprising non-volatile random access memory cells
US-2024380401-A1 · Nov 14, 2024 · US
Memory element and memory apparatus
US8976578B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8976578-B2 |
| Application number | US-201213675725-A |
| Country | US |
| Kind code | B2 |
| Filing date | Nov 13, 2012 |
| Priority date | Nov 30, 2011 |
| Publication date | Mar 10, 2015 |
| Grant date | Mar 10, 2015 |
How to read this patent
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
- Title
What the patent document calls the invention.
- Abstract
A short plain-language summary of the technical disclosure.
- Assignees and inventors
Who owns or filed the patent and who is credited as inventor.
- Key dates
Filing, priority, publication, and grant dates set the timeline.
- First independent claim
The legal scope of protection — read this for what is actually claimed.
- CPC / IPC classifications
Technology tags used to group this patent with similar filings.
- Citations and related patents
Prior art links and similar publications in this corpus.
Abstract
Official abstract text for this publication.
A memory element has a layered configuration, including a memory layer in which a magnetization direction is changed corresponding to information; the magnetization direction being changed by applying a current in a lamination direction of the layered configuration to record the information in the memory layer, a magnetization-fixed layer in which a magnetization direction is fixed, an intermediate layer that is formed of a non-magnetic material and is provided between the memory layer and the magnetization-fixed layer, and a perpendicular magnetic anisotropy inducing layer, the memory layer including a first ferromagnetic layer, a first bonding layer, a second ferromagnetic layer, a second bonding layer and a third ferromagnetic layer laminated in the stated order.
First claim
Opening claim text (preview).
What is claimed is: 1. A memory element having a layered configuration, comprising: a memory layer in which a magnetization direction is changed corresponding to information; the magnetization direction being changed by applying a current in a lamination direction of the layered configuration to record the information in the memory layer, a magnetization-fixed layer in which a magnetization direction is fixed, an intermediate layer that is formed of a non-magnetic material and…
Assignees
Inventors
Classifications
Cross-Sectional Technologies · mapped topic
Cross-Sectional Technologies · mapped topic
- G11C11/161Primary
Physics · mapped topic
Patent family
Related publications grouped by family.
External sources
Next steps
Free tools are coming soon. Tell us what you want to track and we'll notify you.
Frequently asked questions
Answers are generated from the same data shown on this page.
- What does patent US8976578B2 cover?
- A memory element has a layered configuration, including a memory layer in which a magnetization direction is changed corresponding to information; the magnetization direction being changed by applying a current in a lamination direction of the layered configuration to record the information in the memory layer, a magnetization-fixed layer in which a magnetization direction is fixed, an intermed…
- Who is the assignee on this patent?
- Sony Corp
- What technology area does this patent fall under?
- Primary CPC classification G11C11/161. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue Mar 10 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).