Low power non-volatile non-charge-based variable supply RFID tag memory
US-11989606-B2 · May 21, 2024 · US
US8976564B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8976564-B2 |
| Application number | US-201313748773-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jan 24, 2013 |
| Priority date | Feb 20, 2012 |
| Publication date | Mar 10, 2015 |
| Grant date | Mar 10, 2015 |
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A memory device includes an anti-fuse cell array including a plurality of anti-fuse cells. Each anti-fuse cell includes a first cell transistor connected to a common node, a second cell transistor connected to the common node, and an access transistor connected to the common node. The first cell transistor is configured to store data and the second cell transistor is configured to store data when the first cell transistor has defect data.
Opening claim text (preview).
What is claimed is: 1. An anti-fuse circuit comprising: an anti-fuse cell array including a plurality of anti-fuse cells, each anti-fuse cell including a normal cell transistor and a vote cell transistor connected in parallel to each other; and an anti-fuse cell driving circuit configured to generate a normal cell driving voltage applied to the normal cell transistor, and a vote cell driving voltage applied to the vote cell transistor, wherein the normal cell transistor is con…
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