Photodiode self-test

US8975907B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-8975907-B2
Application numberUS-201213362027-A
CountryUS
Kind codeB2
Filing dateJan 31, 2012
Priority dateJun 25, 2007
Publication dateMar 10, 2015
Grant dateMar 10, 2015

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A photodetector array includes a plurality of photodetector cells such as avalanche photodiodes and readout circuits. An array self-tester tests a dark count or other performance characteristic of the cells. The test is performed in connection with the manufacture of the array or following the installation of the array in a detection system.

First claim

Opening claim text (preview).

Having thus described the preferred embodiments, the invention is now claimed to be: 1. A method comprising: using circuitry fabricated on a semiconductor substrate to measure a performance characteristic of a first subset of the cells of a silicon photomultiplier fabricated on the substrate; repeating the step of using for a second subset of the cells, wherein the first and second subsets each include a plurality of cells; and using the silicone photomultiplier to detect radiation indicative of positron annihilations. 2. The method of claim 1 comprising comparing, for each of the cells of the first and second subsets, the measured performance characteristic and a desired performance characteristic. 3. The method of claim 1 comprising using the measured performance characteristic to adjust an operation of a cell. 4. The method of claim 1 wherein the method comprises using the measured performance characteristic to identify faulty cells and inhibiting an operation of the identified cells. 5. The method of claim 1 comprising storing a value in a memory fabricated on the substrate and using the stored value to evaluate the measured performance characteristic of a cell. 6. The method of claim 1 comprising: receiving a first input indicative of a first performance characteristic value; using circuitry fabricated on the substrate to evaluate the measured performance characteristic of a cell in relation to the first performance characteristic value; receiving a second input indicative of a second performance characteristic value; using circuitry fabricated on the substrate to evaluate the measured performance characteristic of the cell in relation to the second performance characteristic value. 7. The method of claim 1 wherein the silicon photomultiplier forms part of a system that operates according to a plurality of operating protocols and the method comprises: determining an operating protocol of the system; establishing a test parameter as a function of the determined protocol; using the test parameter and the measured performance characteristic of a cell to test the cell. 8. The method of claim 1 wherein the performance characteristic of a cell varies as function of a time varying environmental condition and the method comprises: determining a value of the time varying environmental condition; establishing a test parameter as a function of the determined value; using the test parameter and the measured performance characteristic to test the cell. 9. The method of claim 1 wherein the performance characteristic comprises a dark count rate. 10. The method of claim 1 wherein cells of the array are arranged in rows and columns, the first subset includes a first row, the second subset includes a second row, and using includes concurrently testing cells located in each of a plurality of columns, and repeating includes repeating the step of using for the second row. 11. The method of claim 1 including using the measured performance characteristic to identify faulty cells and determining the number of identified faulty cells. 12. The method of claim 1 wherein the circuitry comprises a plurality of counters or adders. 13. The method of claim 1 comprising repeating the step of using and the step of repeating a plurality of times. 14. The method of claim 1 comprising performing the steps of using and repeating as a part of the manufacture of the silicon photomultiplier and using a result of a test performed by the first test circuit to reject or grade the silicon photomultiplier. 15. The method of claim 1 comprising performing the steps of using and repeating following the installation of the silicon photomultiplier in an imaging system. 16. The method of claim 15 wherein the imaging system comprises a first silicon photomultiplier fabricated on a first semiconductor substrate and a second silicon photomultiplier fabricated on a second semiconductor substrate, and the method comprises concurrently performing the steps of using and performing for the first and second silicon photomultipliers. 17. The method of claim 1 comprising using the measured performance characteristic to enable an operation of a plurality of cells and generating image data indicative of radiation detected by the enabled cells. 18. A method comprising: using circuitry fabricated on a semiconductor substrate to measure a performance characteristic of a first subset of the cells of a silicon photomultiplier fabricated on the substrate, wherein the first subset includes a first row; repeating the step of using for a second subset of the cells, wherein the second subset includes a second row, and the first and second subsets each include a plurality of cells, wherein using includes concurrently testing cells located in each of a plurality of columns and repeating includes repeating the step of using for the second row. 19. A method comprising: using circuitry fabricated on a semiconductor substrate to measure a performance characteristic of a first subset of the cells of a silicon photomultiplier fabricated on the substrate; repeating the step of using for a second subset of the cells, wherein the first and second subsets each include a plurality of cells, wherein the steps of using and repeating are performed as a part of the manufacture of the silicon photomultiplier; and using a result of a test performed by the first test circuit to reject or grade the silicon photomultiplier. 20. A method comprising: using circuitry fabricated on a semiconductor substrate to measure a performance characteristic of a first subset of the cells of a silicon photomultiplier fabricated on the substrate; repeating the step of using for a second subset of the cells, wherein the first and second subsets each include a plurality of cells; using the measured performance characteristic to enable an operation of a plurality of cells, and generating image data indicative of radiation detected by the enabled cells.

Assignees

Inventors

Classifications

  • Testing light-emitting diodes, laser diodes or photodiodes · CPC title

  • Silicon photomultipliers [SiPM], e.g. an avalanche photodiode [APD] array on a common Si substrate · CPC title

  • comprising photon counting circuits, e.g. single photon detection [SPD] or single photon avalanche diodes [SPAD] · CPC title

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What does patent US8975907B2 cover?
A photodetector array includes a plurality of photodetector cells such as avalanche photodiodes and readout circuits. An array self-tester tests a dark count or other performance characteristic of the cells. The test is performed in connection with the manufacture of the array or following the installation of the array in a detection system.
Who is the assignee on this patent?
Prescher Gordian, Frach Thomas, Koninkl Philips Nv
What technology area does this patent fall under?
Primary CPC classification G01R31/2635. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Mar 10 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).