Package substrate and semiconductor package including the same
US-2024429153-A1 · Dec 26, 2024 · US
Printed wiring board
US8975742B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8975742-B2 |
| Application number | US-201213598751-A |
| Country | US |
| Kind code | B2 |
| Filing date | Aug 30, 2012 |
| Priority date | Nov 30, 2011 |
| Publication date | Mar 10, 2015 |
| Grant date | Mar 10, 2015 |
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- Title
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Abstract
Official abstract text for this publication.
A printed wiring board includes a substrate, a first buildup formed on a first surface of the substrate and including the outermost conductive layer, and a second buildup layer formed on a second surface of the substrate and including the outermost conductive layer. The outermost layer of the first buildup has pads positioned to connect a semiconductor component, the first buildup has a component mounting region directly under the component such that the outermost layer of the first buildup has a portion in the region, the outermost layer of the second buildup has a portion directly under the region, and the portions satisfy the ratio in the range of from 1.1 to 1.35, where the ratio is obtained by dividing a planar area of the portion of the second buildup by a planar area of the portion of the first buildup.
First claim
Opening claim text (preview).
What is claimed is: 1. A printed wiring board, comprising: a substrate having a first surface and a second surface on an opposite side of the first surface; a first buildup layer formed on the first surface of the substrate and comprising a resin insulation layer and a plurality of conductive layers including an outermost conductive layer; and a second buildup layer formed on the second surface of the substrate and comprising a resin insulation layer and a plurality of conduct…
Assignees
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Classifications
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
- H10W70/685Primary
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US8975742B2 cover?
- A printed wiring board includes a substrate, a first buildup formed on a first surface of the substrate and including the outermost conductive layer, and a second buildup layer formed on a second surface of the substrate and including the outermost conductive layer. The outermost layer of the first buildup has pads positioned to connect a semiconductor component, the first buildup has a compone…
- Who is the assignee on this patent?
- Furutani Toshiki, Furusawa Takeshi, Ibiden Co Ltd
- What technology area does this patent fall under?
- Primary CPC classification H10W70/685. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Mar 10 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).