Integrating through substrate vias into middle-of-line layers of integrated circuits

Patent metadata

Field	Value
Publication number	US-8975729-B2
Application number	US-201213724038-A
Country	US
Kind code	B2
Filing date	Dec 21, 2012
Priority date	Jan 13, 2012
Publication date	Mar 10, 2015
Grant date	Mar 10, 2015

Abstract

A semiconductor wafer has an integrated through substrate via (TSV). The semiconductor wafer includes a substrate. A dielectric layer may be formed on a first side of the substrate. A through substrate via may extend through the dielectric layer and the substrate. The through substrate via may include a conductive material and an isolation layer. The isolation layer may at least partially surround the conductive material. The isolation layer may have a tapered portion.

First claim

What is claimed is:

1. A semiconductor device comprising:
a substrate;
a dielectric layer formed on a first side of the substrate; and
a through substrate via extending through the dielectric layer and the substrate, the through substrate via comprising a conductive material and an isolation layer at least partially surrounding the conductive material, the isolation layer comprising a tapered portion, and wherein the through substrate via further comprises a remnant of a photo…

Assignees

• Qualcomm Inc

Inventors

• Ramachandran Vidhya
• Gu Shiqun

Classifications

• H10W20/076

  Electricity · mapped topic

• H10W20/42

  Electricity · mapped topic

• H10W20/023 Primary

  Electricity · mapped topic

• H10W20/20

  Electricity · mapped topic

• H10W20/0245

  Electricity · mapped topic