Manufacturing method for semiconductor structure
US-12165910-B2 · Dec 10, 2024 · US
US8975723B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8975723-B2 |
| Application number | US-83998910-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jul 20, 2010 |
| Priority date | Jul 21, 2009 |
| Publication date | Mar 10, 2015 |
| Grant date | Mar 10, 2015 |
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An integrated device includes: a semiconductor body having a first, depressed, portion and second portions which project from the first portion; a STI structure, extending on the first portion of the semiconductor body, which delimits laterally the second portions and has a face adjacent to a surface of the first portion; low-voltage CMOS components, housed in the second portions, in a first region of the semiconductor body; and a power component, in a second region of the semiconductor body. The power component has at least one conduction region, formed in the first portion of the semiconductor body, and a conduction contact, coupled to the conduction region and traversing the STI structure in a direction perpendicular to the surface of the first portion of the semiconductor body.
Opening claim text (preview).
The invention claimed is: 1. Integrated device comprising: a semiconductor body having a depressed first portion and second portions projecting from the first portion; an STI insulation structure, extending on the first portion of the semiconductor body, having a first sidewall with the second portions of the semiconductor body, the first sidewall disposed at a first angle with respect to a plane defined by a top surface of the second portion that is less than ninety degrees, ha…
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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Electricity · mapped topic
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