Trench process and structure for backside contact solar cells with polysilicon doped regions

Patent metadata

Field	Value
Publication number	US-8975717-B2
Application number	US-201414252525-A
Country	US
Kind code	B2
Filing date	Apr 14, 2014
Priority date	Jun 12, 2008
Publication date	Mar 10, 2015
Grant date	Mar 10, 2015

Abstract

A solar cell includes polysilicon P-type and N-type doped regions on a backside of a substrate, such as a silicon wafer. A trench structure separates the P-type doped region from the N-type doped region. Each of the P-type and N-type doped regions may be formed over a thin dielectric layer. The trench structure may include a textured surface for increased solar radiation collection. Among other advantages, the resulting structure increases efficiency by providing isolation between adjacent P-type and N-type doped regions, thereby preventing recombination in a space charge region where the doped regions would have touched.

First claim

What is claimed is:

1. A solar cell, comprising:
a solar cell substrate having a front side configured to face the sun during normal operation and a backside opposite the front side;
a P-type doped region and an N-type doped region of the solar cell over the solar cell substrate;
a first dielectric between the solar cell substrate and the P-type and N-type doped regions; and
a trench separating the P-type doped region and the N-type doped region, and at least partially dividing the first dielectric layer.

2. The solar cell of claim 1 , wherein the P-type and N-type doped regions comprise polysilicon.

3. The solar cell of claim 1 , wherein the solar cell substrate comprises an N-type doped silicon substrate.

4. The solar cell of claim 1 , wherein the first dielectric layer comprises silicon dioxide on a backside surface of the solar cell substrate.

5. The solar cell of claim 1 , wherein the trench has a textured surface configured to absorb solar radiation incident on the backside of the solar cell substrate.

6. The solar cell of claim 1 , further comprising a second dielectric disposed in the trench.

7. The solar cell of claim 6 , further comprising a passivation region between the second dielectric and the solar cell substrate.

8. The solar cell of claim 1 , further comprising a diffused passivation region in the solar cell substrate under the trench, wherein the diffused passivation region is doped with an N-type dopant.

9. The solar cell of claim 1 , further comprising interdigitated metal contact fingers electrically coupled to the P-type and N-type doped regions.

10. A semiconductor device, comprising:
a P-type doped region and an N-type doped region formed on a backside of a silicon substrate, wherein the P-type and N-type doped regions are formed over a first dielectric; and
a trench structure separating the P-type doped region and the N-type doped region, and at least partially dividing the first dielectric.

11. The semiconductor device of claim 10 , further comprising a second dielectric formed in the trench structure.

12. The semiconductor device of claim 11 , further comprising metal contacts electrically coupled to the P-type and N-type doped regions through the second dielectric.

13. The semiconductor device of claim 10 , wherein the silicon substrate comprises an N-type silicon substrate.

14. The semiconductor device of claim 10 , wherein the P-type doped region and the N-type doped region comprise polysilicon.

15. The semiconductor device of claim 10 , wherein a surface of the trench structure is randomly textured.

16. A method of fabricating a solar cell, the method comprising:
forming a first dielectric on a silicon substrate;
forming a P-type doped region and an N-type doped region over the first dielectric; and
forming a trench separating the P-type doped region from the N-type doped region and at least partially separating the first dielectric.

17. The method of claim 16 , wherein said forming the trench includes laser trenching to separate the P-type doped region from the N-type doped region.

18. The method of claim 16 , further comprising texturing the trench.

19. The method of claim 16 , wherein said forming a P-type doped region includes:
depositing undoped polysilicon over the first dielectric; and
doping the undoped polysilicon with a P-type dopant.

20. The method of claim 16 , further comprising forming a second dielectric in the trench.

Assignees

• Sunpower Corp

Inventors

• Smith David D

Classifications

• Y02E10/547

  Monocrystalline silicon PV cells · CPC title

• Y02E10/546

  Polycrystalline silicon PV cells · CPC title

• H10F77/1642

  including only Group IV materials · CPC title

• H10F77/935

  for photovoltaic devices or modules · CPC title

• H10F77/707

  of the substrates or of layers on substrates, e.g. textured ITO layer on a glass substrate · CPC title