Package substrate and semiconductor package including the same
US-2024429153-A1 · Dec 26, 2024 · US
Device including two power semiconductor chips and manufacturing thereof
US8975711B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8975711-B2 |
| Application number | US-201113314438-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 8, 2011 |
| Priority date | Dec 8, 2011 |
| Publication date | Mar 10, 2015 |
| Grant date | Mar 10, 2015 |
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- Title
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Abstract
Official abstract text for this publication.
A device includes a first power semiconductor chip with a first contact pad and a second contact pad on a first face and a third contact pad on the second face. The device further includes a second power semiconductor chip with a first contact pad and a second contact pad on a first face and a third contact pad on the second face. The first and second power semiconductor chips are arranged one above another, and the first face of the first power semiconductor chip faces in the direction of the first face of the second power semiconductor chip. In addition, the first power semiconductor chip is located laterally at least partially outside of the outline of the second power semiconductor chip.
First claim
Opening claim text (preview).
What is claimed is: 1. A device, comprising: a first power semiconductor chip having a first face and a second face opposite the first face, wherein a first contact pad and a second contact pad are arranged on the first face and a third contact pad is arranged on the second face, and wherein a first metal layer is attached to the second face of the first power semiconductor chip; and a second power semiconductor chip having a first face and a second face opposite the first face,…
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Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US8975711B2 cover?
- A device includes a first power semiconductor chip with a first contact pad and a second contact pad on a first face and a third contact pad on the second face. The device further includes a second power semiconductor chip with a first contact pad and a second contact pad on a first face and a third contact pad on the second face. The first and second power semiconductor chips are arranged one …
- Who is the assignee on this patent?
- Otremba Ralf, Hoeglauer Josef, Mahler Joachim, and 2 more
- What technology area does this patent fall under?
- Primary CPC classification H10W90/00. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Mar 10 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).