Method for semiconductor device structure
US-12154970-B2 · Nov 26, 2024 · US
Semiconductor device and manufacturing method thereof
US8975181B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8975181-B2 |
| Application number | US-201213398837-A |
| Country | US |
| Kind code | B2 |
| Filing date | Feb 16, 2012 |
| Priority date | Dec 12, 2011 |
| Publication date | Mar 10, 2015 |
| Grant date | Mar 10, 2015 |
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- Title
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Abstract
Official abstract text for this publication.
A semiconductor device and manufacture method thereof include a silicide material formed on a source region and a drain region on opposite sides of a gate, wherein the gate having sidewalls on both side surfaces is formed on a substrate. The gate has a first sidewall spacer and a second sidewall spacer on each sidewall, the first spacer has a horizontal portion and a vertical portion, the horizontal portion is located between the second sidewall spacer and the substrate, the vertical portion is located between the second sidewall spacer and the sidewalls. A protecting layer is selectively deposited on the silicide material.
First claim
Opening claim text (preview).
What is claimed is: 1. A method of manufacturing a semiconductor device, comprising: forming a silicide material on a source region and a drain region on opposite sides of a gate, wherein the gate is formed on a substrate and includes a first sidewall, a second sidewall, and a top surface, and the gate has a first sidewall spacer and a second sidewall spacer disposed respectively on the first and second sidewalls of the gate, the first sidewall spacer including a horizontal portio…
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Classifications
Electricity · mapped topic
Electricity · mapped topic
- H10D64/015Primary
Electricity · mapped topic
Electricity · mapped topic
- H01L29/6653Primary
Electricity · mapped topic
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- What does patent US8975181B2 cover?
- A semiconductor device and manufacture method thereof include a silicide material formed on a source region and a drain region on opposite sides of a gate, wherein the gate having sidewalls on both side surfaces is formed on a substrate. The gate has a first sidewall spacer and a second sidewall spacer on each sidewall, the first spacer has a horizontal portion and a vertical portion, the horiz…
- Who is the assignee on this patent?
- Li Fenglian, Semiconductor Mfg Int Beijing
- What technology area does this patent fall under?
- Primary CPC classification H10D64/015. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Mar 10 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).