Methods of forming semiconductor devices
US-2024387699-A1 · Nov 21, 2024 · US
Method of manufacturing a memory device using fine patterning techniques
US8975178B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8975178-B2 |
| Application number | US-201213602841-A |
| Country | US |
| Kind code | B2 |
| Filing date | Sep 4, 2012 |
| Priority date | Dec 27, 2011 |
| Publication date | Mar 10, 2015 |
| Grant date | Mar 10, 2015 |
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- Title
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Abstract
Official abstract text for this publication.
According to one embodiment, a method of manufacturing a device, includes forming a first core including a line portion extending between first and second regions and having a first width and a fringe having a dimension larger than the first width, forming a mask on the fringe and on a first sidewall on the first core, removing the first core so that a remaining portion having a dimension larger than the first width is formed below the mask, forming a second sidewall on a pattern corresponding the first sidewall and the remaining portion, the second sidewall having a second width less than the first width and facing a first interval less than the first width in the first region and facing a second interval larger than the first interval in the second region.
First claim
Opening claim text (preview).
What is claimed is: 1. A method of manufacturing a semiconductor device, comprising: forming a first layer to be processed on a first region and a second region of a semiconductor substrate; forming a first core material above the first layer, the first core material including a line portion extending in a first direction from the first region toward the second region and having a first line width in a second direction perpendicular to the first direction and a fringe connected…
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Classifications
Electricity · mapped topic
- H10P76/4085Primary
Electricity · mapped topic
Electricity · mapped topic
- H10W20/071Primary
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US8975178B2 cover?
- According to one embodiment, a method of manufacturing a device, includes forming a first core including a line portion extending between first and second regions and having a first width and a fringe having a dimension larger than the first width, forming a mask on the fringe and on a first sidewall on the first core, removing the first core so that a remaining portion having a dimension large…
- Who is the assignee on this patent?
- Kikutani Keisuke, Nagashima Satoshi, Mukai Hidefumi, and 3 more
- What technology area does this patent fall under?
- Primary CPC classification H10P76/4085. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Mar 10 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).