Package substrate and semiconductor package including the same
US-2024429153-A1 · Dec 26, 2024 · US
Method for manufacturing a multilayered circuit board
US8973259B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8973259-B2 |
| Application number | US-201113228496-A |
| Country | US |
| Kind code | B2 |
| Filing date | Sep 9, 2011 |
| Priority date | Oct 14, 2005 |
| Publication date | Mar 10, 2015 |
| Grant date | Mar 10, 2015 |
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- Title
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Abstract
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A method for manufacturing a multilayered printed circuit board including forming a first insulating resin substrate having a metal layer substantially corresponding to dimensions of a semiconductor device, forming a second insulating resin substrate, forming a recess extending to the metal layer of the first insulating resin substrate such that a surface of the metal layer is exposed, accommodating the semiconductor device in the recess such that the semiconductor device is mounted on the surface of the metal layer, and forming a resin insulating layer on the first insulating resin substrate such that the semiconductor device accommodated in the recess is covered.
First claim
Opening claim text (preview).
What is claimed is: 1. A method for manufacturing a multilayered printed circuit board, comprising: forming a first insulating resin substrate comprising a resin insulating layer and a metal layer formed on a surface of the resin insulating layer and substantially corresponding to dimensions of a semiconductor device; forming on the surface of the resin insulating layer a second insulating resin substrate comprising a resin insulating layer such that a first surface of the metal…
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Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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- What does patent US8973259B2 cover?
- A method for manufacturing a multilayered printed circuit board including forming a first insulating resin substrate having a metal layer substantially corresponding to dimensions of a semiconductor device, forming a second insulating resin substrate, forming a recess extending to the metal layer of the first insulating resin substrate such that a surface of the metal layer is exposed, accommod…
- Who is the assignee on this patent?
- Ito Sotaro, Takahashi Michimasa, Mikado Yukinobu, and 1 more
- What technology area does this patent fall under?
- Primary CPC classification H10W70/611. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Mar 10 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).