Multimode physical layer module for supporting delivery of high-speed data services in home multimedia networks

US8973062B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-8973062-B2
Application numberUS-201113158615-A
CountryUS
Kind codeB2
Filing dateJun 13, 2011
Priority dateJan 21, 2010
Publication dateMar 3, 2015
Grant dateMar 3, 2015

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Abstract

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A multimode physical (MMP) layer circuit for physical (PHY) layer handling of signals transported over a high-definition multimedia interface (HDMI) cable in a home multimedia network, wherein the signals are compliant with at least two different PHY layer modes. The MMP layer circuits comprises a plurality of PHY transceivers respectively coupled to a plurality of TP channels of the HDMI cable through a HDMI connector, wherein each PHY transceiver of the plurality of PHY transceivers handles signals transported over its respective TP channel according to a PHY layer mode of the transported signals; and a controller is coupled to the HDMI connector and to each of the plurality of PHY transceivers, the controller recognizes the PHY layer mode of signals transported over each of the plurality of TP channels and sets each of the plurality of PHY transceivers according to the recognized PHY layer mode.

First claim

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What is claimed is: 1. A multimode physical (MMP) layer circuit module for physical (PHY) layer handling of signals transported over a high-definition multimedia interface (HDMI) cable in the home multimedia network, wherein the signals are compliant with at least two different PHY layer modes, the MMP layer circuit module comprising: a plurality of PHY transceivers respectively coupled to a plurality of twisted pair (TP) channels of the HDMI cable through a HDMI connector, wherei…

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What does patent US8973062B2 cover?
A multimode physical (MMP) layer circuit for physical (PHY) layer handling of signals transported over a high-definition multimedia interface (HDMI) cable in a home multimedia network, wherein the signals are compliant with at least two different PHY layer modes. The MMP layer circuits comprises a plurality of PHY transceivers respectively coupled to a plurality of TP channels of the HDMI cable…
Who is the assignee on this patent?
Bar-Niv Amir, Cadence Design Systems Inc
What technology area does this patent fall under?
Primary CPC classification H04N7/106. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 03 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).