Test messaging and control circuitry coupled to power pad

Patent metadata

Field	Value
Publication number	US-8972809-B2
Application number	US-201313941844-A
Country	US
Kind code	B2
Filing date	Jul 15, 2013
Priority date	Sep 13, 2006
Publication date	Mar 3, 2015
Grant date	Mar 3, 2015

Abstract

The present disclosure describes a novel method and apparatus for using a device's power and ground terminals as a test and/or debug interface for the device. According to the present disclosure, messages are modulated over DC voltages applied to the power terminals of a device to input test/debug messages to the device and output test/debug messages from the device. The present disclosure advantageously allows a device to be tested and/or debugged without the device having any shared or dedicated test or debug interface terminals.

First claim

What is claimed is:

1. An integrated circuit comprising:
A. a power terminal and a ground terminal accessible to outside the integrated circuit;
B. functional circuitry having functional input and output leads and having power and ground leads coupled to the power and ground terminals;
C. test circuitry having test leads connected to the functional circuitry and having a dedicated device test output lead extending from the test circuitry, the dedicated device test output lead…

Assignees

• Texas Instruments Inc

Inventors

• Whetsel Lee D

Classifications

• G01R31/31919

  Physics · mapped topic

• G01R31/31917 Primary

  Physics · mapped topic

• G01R31/318511

  Physics · mapped topic

• G01R31/31722

  Physics · mapped topic

• G01R31/31721

  Physics · mapped topic