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Methods and systems for controlling a semiconductor fabrication process
US8972029B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8972029-B2 |
| Application number | US-87720307-A |
| Country | US |
| Kind code | B2 |
| Filing date | Oct 23, 2007 |
| Priority date | Nov 10, 2003 |
| Publication date | Mar 3, 2015 |
| Grant date | Mar 3, 2015 |
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Abstract
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Software for controlling processes in a heterogeneous semiconductor manufacturing environment may include a wafer-centric database, a real-time scheduler using a neural network, and a graphical user interface displaying simulated operation of the system. These features may be employed alone or in combination to offer improved usability and computational efficiency for real time control and monitoring of a semiconductor manufacturing process. More generally, these techniques may be usefully employed in a variety of real time control systems, particularly systems requiring complex scheduling decisions or heterogeneous systems constructed of hardware from numerous independent vendors.
First claim
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What is claimed is: 1. A computer program product comprising computer executable code embodied on a non-transitory computer readable medium that, when executing on one or more computing devices, performs the steps of: creating a data structure for a workpiece in a memory of the one or more computing devices, the data structure including an identity of the workpiece and one or more fields for storing workpiece processing data; receiving the workpiece processing data from a semico…
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Frequently asked questions
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- What does patent US8972029B2 cover?
- Software for controlling processes in a heterogeneous semiconductor manufacturing environment may include a wafer-centric database, a real-time scheduler using a neural network, and a graphical user interface displaying simulated operation of the system. These features may be employed alone or in combination to offer improved usability and computational efficiency for real time control and moni…
- Who is the assignee on this patent?
- Pannese Patrick D, Kavathekar Vinaya, Van Der Meulen Peter, and 1 more
- What technology area does this patent fall under?
- Primary CPC classification G05B99/00. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue Mar 03 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).